Synthetic division gives negative remainders in certain cases. This paper proposes to have zero or positive remainder for synthetic division in accordance with Euclid division algorithm. In case of negative remainders in synthetic division, the remainder is made zero or positive by suitably adding or subtracting the divisor. The quotient is adjusted suitably. The synthetic division algorithm propose in [8] is used. The inputs for the division can be positive or negative. The decimal notation is used for calculations. To the best of the author's knowledge this is the first paper to propose algorithm for positive and negative operands for division. The proposed algorithm is simulated in Quartus 2 Toolkit. An area of 42% with power consumption of 77.64mW and timing of 566.928ns is observed for the chosen simulation parameters.